View MAX4717_130530.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-2627; Rev 0; 10/02
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
General Description
The MAX4717/MAX4718 low-voltage, low on-resistance (RON), dual single-pole/double throw (SPDT) analog switches operate from a single +1.8V to +5.5V supply. These devices are designed for USB 1.1 and audio switching applications. The MAX4717 features two 4.5 R ON (max) SPDT switches with 1.2 flatness and 0.3 matching between channels. The MAX4718 features one 4.5 RON (max) SPDT switch and one 20 RON (max) SPDT switch. The 20 switch has a guaranteed matching and flatness of 0.4 and 1.2, respectively. These switches offer breakbefore-make switching (1ns) with tON <80ns and tOFF <40ns at +2.7V. The digital logic inputs are +1.8V logic compatible with a +2.7V to +3.6V supply. These switches are packaged in a chip-scale package (UCSPTM), significantly reducing the required PC board area. The chip occupies only a 2.0mm 1.50mm area and has a 4 3 bump array with a bump pitch of 0.5mm. These switches are also available in a 10-pin MAX package.
Features
o USB 1.1 Signal Switching Compliant o 2ns (max) Differential Skew o -3dB Bandwidth: >300MHz o Low 15pF On-Channel Capacitance o Single-Supply Operation from +1.8V to +5.5V o 4.5 RON (max) Switches (MAX4717/MAX4718) 0.3 (max) RON Match (+3.0V Supply) 1.2 (max) Flatness (+3.0V Supply) o 20 RON (max) Switch (MAX4718) 0.4 (max) RON Match (+3.0V Supply) 1.2 (max) Flatness (+3.0V Supply) o Rail-to-Rail(R) Signal Handling o High Off-Isolation: -55dB (10MHz) o Low Crosstalk: -80dB (10MHz) o Low Distortion: 0.03% o +1.8V CMOS-Logic Compatible o <0.5nA Leakage Current at +25C
MAX4717/MAX4718
Applications
USB 1.1 Signal Switching Circuits Battery-Operated Equipment Audio/Video-Signal Routing Headphone Switching Low-Voltage Data-Acquisition Systems Sample-and-Hold Circuits Cell Phones PDAs
UCSP is a trademark of Maxim Integrated Products, Inc. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
PART MAX4717EUB MAX4717EBC-T* MAX4718EUB MAX4718EBC-T*
Ordering Information
TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN/BUMPPACKAGE 10 MAX 12 UCSP-12 10 MAX 12 UCSP-12 TOP MARK -- ABH -- ABI
Note: UCSP package requires special solder temperature profile described in the Absolute Maximum Ratings section. *UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and environment. See the UCSP reliability notice in the UCSP Reliability section of this data sheet for more information.
Pin Configurations/Functional Diagrams/Truth Tables
TOP VIEW
(BUMP SIDE DOWN) NC1 IN1 COM1 NO1
MAX4717/MAX4718
GND C1 C2 C3 B1 A1 A2 A3 NC2 IN2
PART MAX4717 MAX4718
SPDT1 4.5 4.5
SPDT2 4.5 20 V+ 1 NO1 2
MAX4717/MAX4718
10 NO2 9 8 7 6 MAX COM2 IN2 NC2 GND
MAX4717/MAX4718 COM2 NO2 IN_ 0 C4 B4 V+ UCSP A4 1 NO_ OFF ON NC_ ON OFF
COM1 3 IN1 4 NC1 5
SWITCHES SHOWN FOR LOGIC "0" INPUT
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP MAX4717/MAX4718
ABSOLUTE MAXIMUM RATINGS
(All Voltages Referenced to GND) V+, IN_...................................................................-0.3V to +6.0V COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V) Continuous Current COM_, NO_, NC_ ...........................100mA Peak Current COM_, NO_, NC_ (pulsed at 1ms, 10% duty cycle)................................200mA Continuous Power Dissipation (TA = +70C) 10-Pin MAX (derate 5.6mW/C above +70C) ...........444mW 12-Bump UCSP (derate 11.4mW/C above +70C) ....909mW ESD Method 3015.7 .............................................................>2kV Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Bump Temperature (soldering) (Note 2) Infrared (15s) ...............................................................+220C Vapor Phase (60s) .......................................................+215C
Note 1: Signals on COM_, NO_, or NC_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 020A, paragraph 7.6, table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS--Single +3V Supply
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4)
PARAMETER Analog Signal Range SYMBOL VCOM_, VNO_, VNC_ CONDITIONS TA TMIN to TMAX +25C On-Resistance (Note 5) RON V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.5V V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.5V V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.0V, 1.5V, 2.0V V+ = 3.6V, VCOM_ = 0.3V, 3.3V; VNO_ or VNC_ = 3.3V, 0.3V V+ = 3.6V, VCOM_ = 0.3V, 3.3V; VNO_ or VNC_ = 0.3V, 3.3V, or floating TMIN to TMAX +25C On-Resistance Match Between Channels (Notes 5, 6) RON TMIN to TMAX +25C On-Resistance Flatness (Note 7) RFLAT(ON) TMIN to TMAX +25C NO_, NC_ Off-Leakage Current (Note 8) INO_(OFF), INC_(OFF) TMIN to TMAX +25C TMIN to TMAX +25C On-Resistance (Note 5) RON V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.5V TMIN to TMAX -0.5 -1 -1 -2 +0.01 +0.01 0.6 0.1 MIN 0 TYP MAX V+ UNITS V
ANALOG SWITCH (Low RON--MAX4717/MAX4718 SPDT 1) 3.0 4.5 5 0.3 0.4 1.2 1.5 +0.5 +1 +1 +2 nA nA
COM_ On-Leakage Current (Note 8)
ICOM_(ON)
ANALOG SWITCH (High RON--MAX4718 SPDT 2) 15 20 25
2
_______________________________________________________________________________________
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS--Single +3V Supply (continued)
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4)
PARAMETER On-Resistance Match Between Channels (Notes 5, 6) SYMBOL RON CONDITIONS V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.5V V+ = 2.7V, ICOM_ = 10mA; VNO_ or VNC_ = 1.0V, 1.5V, 2.0V V+ = 3.6V, VCOM_ = 0.3V, 3.3V; VNO_ or VNC_ = 3.3V, 0.3V V+ = 3.6V, VCOM_ = 0.3V, 3.3V; VNO_ or VNC_ = 0.3V, 3.3V, or floating TA +25C TMIN to TMAX +25C On-Resistance Flatness (Note 7) RFLAT(ON) TMIN to TMAX +25C NO_, NC_ Off-Leakage Current (Note 8) INO_(OFF), INC_(OFF) TMIN to TMAX +25C TMIN to TMAX +25C TMIN to TMAX +25C TMIN to TMAX +25C Break-Before-Make Time Delay (Note 8) Skew (Note 8) Charge Injection tBBM VNO_, VNC_ = 1.5V; RL = 300, CL = 35pF, Figure 2 RS = 39, CL = 50pF, Figure 3 VGEN = 1.5V, RGEN = 0, CL = 1.0nF, Figure 4 f = 10MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5 f = 1MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5 f = 10MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5 f = 1MHz; VNO_, VNC_ = 1VP-P; RL = 50, CL = 5pF, Figure 5 Signal = 0dBm, RL = 50, CL = 5pF, Figure 5 VCOM = 2VP-P, RL = 600 +25C +25C +25C TMIN to TMAX TMIN to TMAX +25C 1 0.15 5 -55 +25C -80 -80 +25C -110 >300 0.03 9 MHz % pF dB dB 2 8 ns 20 -0.5 -1 -1 -2 +0.01 +0.01 0.6 MIN TYP 0.15 MAX 0.4 0.5 1.2 1.5 +0.5 +1 +1 +2 nA nA UNITS
MAX4717/MAX4718
COM_ On-Leakage Current (Note 8) DYNAMIC CHARACTERISTICS Turn-On Time
ICOM_(ON)
tON
VNO_, VNC_ = 1.5V; RL = 300, CL = 35pF, Figure 1; VIH = 1.5V, VIL = 0V VNO_, VNC_ = 1.5V; RL = 300, CL = 35pF, Figure 1; VIH = 1.5V, VIL = 0V
40
80 100 40 50 ns ns
Turn-Off Time
tOFF
tSKEW Q
ns pC
Off-Isolation
VISO
Crosstalk (Note 9)
VCT
On-Channel -3dB Bandwidth Total Harmonic Distortion NO_, NC_ Off-Capacitance
BW THD
CNO_(OFF), f = 1MHz, Figure 6 CNC_(OFF)
_______________________________________________________________________________________
3
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP MAX4717/MAX4718
ELECTRICAL CHARACTERISTICS--Single +3V Supply (continued)
(V+ = +2.7V to +3.6V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4)
PARAMETER Switch On-Capacitance DIGITAL I/O Input Logic High Voltage Input Logic Low Voltage Input Leakage Current POWER SUPPLY Power-Supply Range Supply Current V+ I+ V+ = +5.5V, VIN_ = 0V or V+ TMIN to TMAX TMIN to TMAX 1.8 5.5 1 V A VIH VIL IIN V+ = +3.6V, VIN_ = 0 or 5.5V TMIN to TMAX TMIN to TMAX TMIN to TMAX -100 1.4 0.5 +100 V V nA SYMBOL C(ON) CONDITIONS f = 1MHz, Figure 6 TA +25C MIN TYP 15 MAX UNITS pF
ELECTRICAL CHARACTERISTICS--Single +5V Supply
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4)
PARAMETER Analog Signal Range SYMBOL VCOM_, VNO_, VNC_ CONDITIONS TA TMIN to TMAX +25C On-Resistance (Note 5) RON V+ = 4.2V, ICOM_ = 10mA; VNO_ or VNC_ = 3.5V V+ = 4.2V, ICOM_ = 10mA; VNO_ or VNC_ = 3.5V V+ = 4.2V, ICOM_ = 10mA; VNO_ or VNC_ = 1.0V, 2.0V, 3.5V V+ = 5.5V; VCOM_ = 1.0V, 4.5V; VNO_ or VNC_ = 1.0V, 4.5V V+ = 5.5V; VCOM_ = 1.0V, 4.5V; VNO_ or VNC_ = 1.0V, 4.5V, or floating TMIN to TMAX +25C On-Resistance Match Between Channels (Notes 5, 6) RON TMIN to TMAX +25C On-Resistance Flatness (Note 7) RFLAT(ON) TMIN to TMAX +25C NO_, NC_ Off-Leakage Current (Note 8) INO_(OFF), INC_(OFF) TMIN to TMAX +25C TMIN to TMAX -0.5 -1 -1 -2 +0.01 +0.01 0.4 0.1 MIN 0 TYP MAX V+ UNITS V
ANALOG SWITCH (Low RON--MAX4717/MAX4718 SPDT 1) 1.7 3 3.5 0.3 0.4 1.2 1.5 +0.5 +1 +1 +2 nA nA
COM_ On-Leakage Current (Note 8)
ICOM_(ON)
4
_______________________________________________________________________________________
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS--Single +5V Supply (continued)
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4)
PARAMETER SYMBOL CONDITIONS TA +25C On-Resistance (Note 5) RON V+ = 4.2V, ICOM_ = 10mA; VNO_ or VNC_ = 3.5V V+ = 4.2V, ICOM_ = 10mA; VNO_ or VNC_ = 3.5V V+ = 4.2V, ICOM_ = 10mA; VNO_ or VNC_ = 1.0V, 2.0V, 4.5V V+ = 5.5V; VCOM_ = 1.0V, 4.5V; VNO_ or VNC_= 1.0V, 4.5V V+ = 5.5V, VCOM_ = 1.0V, 4.5V; VNO_ or VNC_ = 1.0V, 4.5V, or floating TMIN to TMAX +25C On-Resistance Match Between Channels (Notes 5, 6) RON TMIN to TMAX +25C On-Resistance Flatness (Note 7) RFLAT(ON) TMIN to TMAX +25C NO_, NC_ Off-Leakage Current (Note 8) INO_(OFF), INC_(OFF) TMIN to TMAX +25C TMIN to TMAX +25C Turn-On Time tON VNO_, VNC_ = 3.0V; RL = 300, CL = 35pF, Figure 1 VNO_, VNC_ = 3.0V; RL = 300, CL = 35pF, Figure 1 VNO_, VNC_ = 3.0V; RL = 300, CL = 35pF, Figure 2 RS = 39, CL = 50pF, Figure 3 TMIN to TMAX +25C Turn-Off Time tOFF TMIN to TMAX +25C Break-Before-Make Time Delay (Note 8) Skew (Note 8) DIGITAL I/O Input Logic High Voltage Input Logic Low Voltage Input Leakage Current VIH VIL IIN V+ = 5.5V, VIN_ = 0V or V+ TMIN to TMAX TMIN to TMAX TMIN to TMAX -100 2.0 0.8 +100 V V nA tBBM TMIN to TMAX TMIN to TMAX 1 0.15 2 8 ns 20 -0.5 -1 -1 -2 +0.01 +0.01 0.4 0.15 MIN TYP 12 MAX 20 25 0.4 0.5 1.2 1.5 +0.5 +1 +1 +2 nA nA UNITS
MAX4717/MAX4718
ANALOG SWITCH (High RON--MAX4718 SPDT 2)
COM_ On-Leakage Current (Note 8) DYNAMIC CHARACTERISTICS
ICOM_(ON)
30
80 100 40 50 ns ns
tSKEW
ns
_______________________________________________________________________________________
5
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP MAX4717/MAX4718
ELECTRICAL CHARACTERISTICS--Single +5V Supply (continued)
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V, TA = +25C, unless otherwise noted.) (Notes 3, 4)
PARAMETER POWER SUPPLY Power-Supply Range Supply Current V+ I+ V+ = 5.5V, VIN_ = 0V or V+ TMIN to TMAX TMIN to TMAX 1.8 5.5 1 V A SYMBOL CONDITIONS TA MIN TYP MAX UNITS
Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9:
UCSP parts are 100% tested at +25C only, and guaranteed by design over the specified temperature range. MAX parts are 100% tested at TMAX and guaranteed by design over the specified temperature range. The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value is a maximum. Guaranteed by design for UCSP parts. RON = RON(MAX) - RON(MIN). Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Guaranteed by design. Between any two switches.
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
ON-RESISTANCE vs. VCOM
MAX4717/18 toc01
ON-RESISTANCE vs. VCOM
MAX4717/18 toc02
ON-RESISTANCE vs. VCOM
V+ = 5V LOW RON SWITCH
MAX4717/18 toc03
10
LOW RON SWITCH
6 V+ = 3V LOW RON SWITCH 5
5
8 V+ = 1.8V RON () 6 V+ = 2.5V 4 V+ = 3V V+ = 4.2V V+ = 5V
4
RON ()
RON ()
4 TA = +25C
TA = +85C
3 TA = +25C 2 TA = +85C
3
2
2 TA = -40C
1 TA = -40C 0 0 0.5 1.0 1.5 VCOM (V) 2.0 2.5 3.0 0 1 2 3 4 5 VCOM (V)
0 0 1 2 3 4 5 VCOM (V)
1
6
_______________________________________________________________________________________
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
MAX4717/MAX4718
ON-RESISTANCE vs. VCOM
MAX4717/18 toc04
ON-RESISTANCE vs. VCOM
MAX4717/18 toc05
ON-RESISTANCE vs. VCOM
V+ = 5V HIGH RON SWITCH
MAX4717/18 toc06
20 V+ = 1.8V 18
HIGH RON SWITCH
15 V+ = 3V HIGH RON SWITCH 14 TA = +85C
15
14 TA = +85C
RON ()
RON ()
V+ = 2.5V V+ = 4.2V
14
12 TA = -40C TA = +25C
RON ()
16
13
13
12
12 V+ = 5V 0 1 2 3 4 5
11
11 TA = -40C TA = +25C 3 4 5
10 VCOM (V)
10 0 0.5 1.0 1.5 VCOM (V) 2.0 2.5 3.0
10 0 1 2 VCOM (V)
LEAKAGE CURRENT vs. TEMPERATURE
MAX4717/18 toc07
LEAKAGE CURRENT vs. TEMPERATURE
MAX4717/18 toc08
LEAKAGE CURRENT vs. TEMPERATURE
V+ = 3V HIGH RON SWITCH LEAKAGE CURRENT (pA) 500 COM ON-LEAKAGE
MAX4717/18 toc09
500 V+ = 3V LOW RON SWITCH 400 LEAKAGE CURRENT (pA)
1000 V+ = 5V LOW RON SWITCH 800 LEAKAGE CURRENT (pA)
700
300
COM ON-LEAKAGE COM OFF-LEAKAGE
600 COM ON-LEAKAGE COM OFF-LEAKAGE 400
300
COM OFF-LEAKAGE
200
100
200
100
0 -40 -15 10 35 60 85 TEMPERATURE (C)
0 -40 -15 10 35 60 85 TEMPERATURE (C)
-100 -40 -15 10 35 60 85 TEMPERATURE (C)
LEAKAGE CURRENT vs. TEMPERATURE
MAX4717/18 toc10
CHARGE INJECTION vs. VCOM
MAX4717/18 toc11
SUPPLY CURRENT vs. TEMPERATURE
MAX4717/18 toc12
900 V+ = 5V HIGH RON SWITCH 700 LEAKAGE CURRENT (pA)
50
6 5 SUPPLY CURRENT (nA) 4 V+ = 5V 3 2 1 0 V+ = 3V
40 CHARGE INJECTION (pC) CL = 1nF V+ = 5V 30 CL = 1nF V+ = 3V
500
COM ON-LEAKAGE
300
COM OFF-LEAKAGE
20
100
10
-100 -40 -15 10 35 60 85 TEMPERATURE (C)
0 0 1 2 3 4 5 VCOM (V)
-40
-15
10
35
60
85
TEMPERATURE (C)
_______________________________________________________________________________________
7
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP MAX4717/MAX4718
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. LOGIC LEVEL
MAX4717/18 toc13
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
MAX4717/18 toc14
TURN-ON/OFF TIME vs. SUPPLY VOLTAGE
LOW RON SWITCH 80 tON/tOFF (ns)
MAX4717/18 toc15
100
2.0
100
80 SUPPLY CURRENT (A) V+ = 5V 60
1.6 LOGIC THRESHOLD (V) VTH+ 1.2 VTH0.8
60 tON 40 tOFF
40 V+ = 3V 20
0.4
20
0 0 1 2 3 4 5 LOGIC LEVEL (V)
0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
0 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V)
TURN-ON/OFF TIME vs. SUPPLY VOLTAGE
MAX4717/18 toc16
TURN-ON/OFF TIME vs. TEMPERATURE
MAX4717/18 toc17
TURN-ON/OFF TIME vs. TEMPERATURE
HIGH RON SWITCH tON, V+ = 3.0V 50 tON/tOFF (ns) 40 30 20 tOFF, V+ = 3.0V 10 0 tOFF, V+ = 5.0V tON, V+ = 5.0V
MAX4717/18 toc18
100 HIGH RON SWITCH 80 tON/tOFF (ns)
60 LOW RON SWITCH 50 40 30 20 10 0 tOFF, V+ = 3.0V tON, V+ = 3.0V tON, V+ = 5.0V
60
60 tON 40 tOFF 20
tON/tOFF (ns)
tOFF, V+ = 5.0V
0 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (C)
TEMPERATURE (C)
RISE/FALL-TIME DELAY vs. SUPPLY VOLTAGE
MAX4717/18 toc19
RISE/FALL-TIME DELAY vs. TEMPERATURE
MAX4717/18 toc20
RISE TIME TO FALL TIME MISMATCH vs. SUPPLY VOLTAGE
INPUT RISE/FALL TIME = 15ns FIGURE 4, CL = 50pF LOW RON SWITCH 300 MISMATCH (ps)
MAX4717/18 toc21
3.0 OUTPUT RISE/FALL-TIME DELAY (ps) 2.5 2.0 1.5 RISE DELAY 1.0 0.5 0 1.5 2.5 3.5 4.5 FALL DELAY INPUT RISE/FALL TIME = 15ns FIGURE 4, CL = 50pF LOW RON SWITCH
2.0 OUTPUT RISE/FALL-TIME DELAY (ns) INPUT RISE/FALL TIME = 15ns FIGURE 4, CL = 50pF V+ = 4.2V LOW RON SWITCH
400
1.5
1.0 RISE DELAY 0.5
200
FALL DELAY
100
0 5.5 -40 -15 10 35 60 85 SUPPLY VOLTAGE (V) TEMPERATURE (C)
0 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V)
8
_______________________________________________________________________________________
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
MAX4717/MAX4718
RISE TIME TO FALL TIME MISMATCH vs. TEMPERATURE
MAX4717/18 toc22
SKEW vs. SUPPLY VOLTAGE
MAX4717/18 toc23
SKEW vs. TEMPERATURE
INPUT RISE/FALL TIME = 15ns FIGURE 4, CL = 50pF V+ = 4.2V MAX4717 ONLY
MAX4717/18 toc24
200 INPUT RISE/FALL TIME = 15ns FIGURE 4, CL = 50pF V+ = 4.2V LOW RON SWITCH
400 INPUT RISE/FALL TIME = 15ns FIGURE 4, CL = 50pF MAX4717 ONLY 300 SKEW (ps)
200
150 MISMATCH (ps)
150 SKEW (ps)
100
200
100
50
100
50
0 -40 -15 10 35 60 85 TEMPERATURE (C)
0 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V)
0 -40 -15 10 35 60 85 TEMPERATURE (C)
FREQUENCY RESPONSE
MAX4717/18 toc25
FREQUENCY RESPONSE
V+ = 3V/5V HIGH RON SWITCH 0 -20 ON-LOSS (dB) -40 -60 -80 -100 OFF-ISOLATION ON-LOSS
MAX4717/18 toc26
20 0 -20 ON-LOSS (dB) -40 -60 -80 -100 -120
V+ = 3V/5V
LOW RON SWITCH
20
ON-LOSS
OFF-ISOLATION
CROSSTALK
-120 -140 0.0001 0.01 1
CROSSTALK
-140 0.0001
0.01
1
100
100
FREQUENCY (MHz)
FREQUENCY (MHz)
TOTAL HARMONIC DISTORTION vs. FREQUENCY
MAX4717/18 toc27
TOTAL HARMONIC DISTORTION vs. FREQUENCY
V+ = 3V HIGH RON SWITCH RL = 600
MAX4717/18 toc28
1
V+ = 3V LOW RON SWITCH RL = 600
1
THD (%)
THD (%)
0.1
0.1
0.01 10 100 1k FREQUENCY (Hz) 10k 100k
0.01 10 100 1k FREQUENCY (Hz) 10k 100k
_______________________________________________________________________________________
9
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP MAX4717/MAX4718
Pin Description
PIN UCSP A1 A2 A3 A4 B1 B4 C1 C2 C3 C4 MAX 7 8 9 10 6 1 5 4 3 2 NAME NC2 IN2 COM2 NO2 GND V+ NC1 IN1 COM1 NO1 FUNCTION Analog Switch 2--Normally Closed Terminal Digital Control Input for Analog Switch 2 Analog Switch 2--Common Terminal Analog Switch 2--Normally Open Terminal Ground Positive-Supply Voltage Input Analog Switch 1--Normally Closed Terminal Digital Control Input for Analog Switch 1 Analog Switch 1--Common Terminal Analog Switch 1--Normally Open Terminal
+5V supply voltage, the logic thresholds are 0.8V (low) and 2.0V (high).
Analog Signal Levels
The on-resistance of the MAX4717/MAX4718 changes very little for analog input signals across the entire supply voltage range (see the Typical Operating Characteristics). The switches are bidirectional, so the NO_, NC_, and COM_ pins can be either inputs or outputs.
Power-Supply Sequencing and Overvoltage Protection
Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to the device. Proper power-supply sequencing is recommended for all CMOS devices. Always apply V+ before applying analog signals, especially if the analog signal is not current-limited.
UCSP Package Considerations
For general UCSP package information and PC layout considerations, please refer to the Maxim Application Note (Wafer-Level Chip-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering use of a UCSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process. Mechanical stress performance is a greater consideration for a UCSP package. UCSPs are attached through direct solder contact to the user's PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be considered. Information on Maxim's qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim's website at www.maxim-ic.com.
Detailed Description
The MAX4717/MAX4718 high-speed, low-voltage, low onresistance (RON), dual SPDT analog switches operate from a single +1.8V to +5.5V supply. The switches feature break-before-make switching operation and fast switching speeds (tON = 80ns (max), tOFF = 40ns (max)). These switches have low 15pF on-channel capacitance, which allows for 12Mbps switching of the data signals for USB 1.0/1.1 applications. The MAX4717 is designed to switch D+ and D- USB signals with a guaranteed skew of less than 2ns (see Figure 4) as measured from 50% of the input signal to 50% of the output signal.
Applications Information
Digital Control Inputs
The MAX4717/MAX4718 logic inputs accept up to +5.5V regardless of supply voltage. For example, with a +3.3V supply, IN_ can be driven low to GND and high to +5.5V allowing for mixing of logic levels in a system. Driving the control logic inputs rail-to-rail minimizes power consumption. For a +3V supply voltage, the logic thresholds are 0.5V (low) and 1.4V (high); for a
Chip Information
TRANSISTOR COUNT: 235 PROCESS: BiCMOS
10
______________________________________________________________________________________
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
Test Circuits/Timing Diagrams
MAX4717/ MAX4718
VN_ NO_ OR NC_ RL IN_ LOGIC INPUT GND SWITCH OUTPUT 0V t ON CL VOUT 0.9 x V0UT V+ V+ COM_ LOGIC INPUT VOUT t OFF 0.9 x VOUT VIH 50% VIL t r < 5ns t f < 5ns
MAX4717/MAX4718
CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL VOUT = VN_ RL + RON
(
)
IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 1. Switching Time
MAX4717/ MAX4718
VN_ NC_ NO_ IN_ LOGIC INPUT GND
V+ V+ COM_ RL 300 VOUT CL 35pF LOGIC INPUT
VIH 50% VIL
VOUT tBBM CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
0.9 x VOUT
Figure 2. Break-Before-Make Interval
______________________________________________________________________________________
11
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP MAX4717/MAX4718
Test Circuits/Timing Diagrams (continued)
RS IN+
NC1 OR NO1
MAX4717
COM1 CL OUT+
RISE TIME DELAY = |tINRISE - tOUTRISE| FALL TIME DELAY = |tINFALL - tOUTFALL| RISE TIME TO FALL TIME MISMATCH = |tOUTFALL - tOUTRISE|
RS IN-
NC2 OR NO2
COM2 CL
OUT-
IN1
IN2
VIL TO VIH
tINFALL V+ VIN+ 0V V+ VIN0V tOUTFALL V+ VOUT+ 0V V+ VOUT0V 50% 50% 10% 50% 50% 10%
tINRISE
90% 10%
90%
tOUTRISE
90% 10%
90%
tSKEW
Figure 3. Output Signal Skew
12
______________________________________________________________________________________
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
Test Circuits/Timing Diagrams (continued)
V+
MAX4717/MAX4718
MAX4717/ MAX4718
RGEN NC_ OR NO_ GND IN_
VOUT VOUT VOUT CL IN OFF ON OFF
V+ COM_
V GEN
VIL TO VIH
IN
OFF
ON Q = (V OUT )(C L )
OFF
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 4. Charge Injection
+5V 10nF NETWORK ANALYZER 0V OR V+ IN_ V+ COM1 VIN 50 50
V OFF-ISOLATION = 20log OUT VIN V ON-LOSS = 20log OUT VIN V CROSSTALK = 20log OUT VIN
NC1 50
MAX4717/ MAX4718
NO1* GND
VOUT
MEAS
REF
50
50
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
*FOR CROSSTALK THIS PIN IS NO2. NC2 AND COM2 ARE OPEN.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
10nF
V+
V+ COM_
MAX4717/ MAX4718
IN VIL OR VIH
CAPACITANCE METER f = 1MHz
NC_ or NO_ GND
Figure 6. Channel Off/On-Capacitance ______________________________________________________________________________________ 13
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP MAX4717/MAX4718
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
12L, UCSP 4x3.EPS
14
______________________________________________________________________________________
4.5/20, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
10LUMAX.EPS
1 1
MAX4717/MAX4718
e
10
4X S
10
INCHES MAX DIM MIN 0.043 A 0.006 A1 0.002 A2 0.030 0.037 0.120 D1 0.116 0.118 0.114 D2 0.116 0.120 E1 E2 0.114 0.118 H 0.187 0.199 L 0.0157 0.0275 L1 0.037 REF b 0.007 0.0106 e 0.0197 BSC c 0.0035 0.0078 0.0196 REF S 0 6
MILLIMETERS MAX MIN 1.10 0.15 0.05 0.75 0.95 3.05 2.95 3.00 2.89 3.05 2.95 2.89 3.00 4.75 5.05 0.40 0.70 0.940 REF 0.177 0.270 0.500 BSC 0.090 0.200 0.498 REF 0 6
H y 0.500.1 0.60.1
1
1
0.60.1
TOP VIEW
BOTTOM VIEW
D2 GAGE PLANE A2 A b D1 A1
E2 c E1 L1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, 10L uMAX/uSOP
APPROVAL DOCUMENT CONTROL NO. REV.
21-0061
I
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of MAX4717

	To Download MAX4717 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .